XDS100V3 is the third version developed from xds100. It is compliant with IEEE 1149.7 and implements emulation and debugging of TI’s chips through a standard 14-pin JTAG interface.
HardWare Features:
USB2.0 high-speed interface (480 Mbit/s)
14-pin standard JTAG interface. The chips supported include: TMS320C28x, TMS320C54x, TMS320C55x, TMS320C64x+, TMS320C674x、ARM 9, ARM Cortex R4, ARM Cortex A8
Support high-speed code download through USB
Support brown-out detection
Support multiple FTDI devices
Support adaptive clock
Compliant with IEEE 1149.7 Class 4 and work at up to 25MHz
Can be working as a 1149.7 adapter by utilizing the existing scan controller
Have LED indicating the status of USB connection
Software is compatible with XDS100v2 (except link delay and IEEE 1149.7 modes)
Support Code Composer Studio v5 or higher
Support Windows XP, Windows 7 and Linux
note:
1. RDTX and HSRDTX are not supported;
2. Hardware support to TCLKR is not include;
3. CCSV5 or lower version is not supported;
Features
XDS100v1
XDS100v2
XDS100V3
1.8V and 3.3V IOs
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JTAG reset/wait-in-reset boot-modes (using EMU0/1 + nTRST)
Power-on-Reset boot-modes (using EMU0/1 + TVD)
target power-loss detection (using TVD)
Supports CCStudio v3.3
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Supports CCStudio v4
Supports CCStudio v5
USB 1.1 Full Speed (12 Mbit/s)
USB 2.0 High Speed (480 Mbit/s)
14-pin Jtag header
JTAG standard
IEEE1149.1
IEEE1149.7
Processor Family supported
TMS320C28xx TMS320C54xx TMS320C55xx TMS320C64x+ TMS320C674x
TMS320C28xx TMS320C54xx TMS320C55xx TMS320C64x+ TMS320C674x ARM 9 ARM Cortex R4 ARM Cortex-A8